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Our ip core enables you to create chips for automotive nn acceleration with excellent sustained performance and low power under real workloads

Learn the details!

Scalable architecture enables smart sensors and central compute clusters for real-time inference of high-resolution inputs

Read about our solutions!

aiWare includes...

  • an automotive NN accelerator IP optimized to deliver sustained performance and low power
  • a highly scalable and configurable architecture that scales from 1 TOPS to over 50 TOPS
  • exceptionally efficient due to tightly coupled local SRAM and patented data management

And is not...

  • a programmable core with programmable caches
  • yet another matrix multiplier derivative architecture
  • DSP or MCU based
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