Apache5 Automotive Production SoC
powered by aiWare™ NPU
The aiWare NPU has been proven through extensive benchmarks and a wide range of automotive AI applications to be the industry's most efficient NPU for high-resolution automotive vision applications. Nextchip's Apache5 IEP (Imaging Edge Processor) features a powerful aiWare3P-based 1.6 TOPS NPU ideal for L2/L2+/L3 vision-based ADAS systems. Apache5 integrates a high performance quad-core Arm A53 CPU cluster alongside Nextchip's own advanced ISP for unrivalled image sensor pre-processing including a wide range of Nextchip's own image enhancement technologies. Thanks to aiWare, Apache5 is the automotive industry's leading imaging edge processor for AI-enabled applications.
Industry-leading efficiency for low-latency automotive CNN inference
We have successfully demonstrated NNs executing automotive vision applications at up to 98% efficiency, as much as 2x-3x better than other NPUs targeting automotive inference. And because aiWare is a highly scalable architecture, it can deliver class-leading efficiency whatever the size of aiWare core, with no limit to input size or CNN depth. This combination of exceptional performance, workload flexibility plus low power and latency made aiWare the perfect choice for Apache5.
Apache5 IEP (Imaging Edge Processor) for vision-based ADAS
- aiWare3P 1.6 TOPS NPU delivering up to 98% efficiency
- Arm A53 quad-core CPU cluster
- Nextchip ISP supporting up to 5.7Mpixels @30fps
- Nextchip advanced ISP imaging algorithms including AE, AWB, HDR, LFM, LDC (Dewarping), Defog, 2D/3D-NR, Auto Calibration, PGL, OSG
Perfectly optimized for automotive CNN inference
- Because aiWare can execute 100% of all layer functions in a wide range of CNNs, it provides Apache5 software developers with an extremely simple programming interface
- aiWare Studio provides a comprehensive, easy-to-use set of compilation and performance analysis tools
- Driving Monitoring System (DMS)
- Smart Rear View (SRV)
- Autonomous Emergency Braking (AEB)
- Lane Departure Warning System (LWDS)
- Lane Keeping Assist System (LKAS)
Apache5 Key Specification
|NPU||aiWare3P, 1.6 TOPS @ 800MHz, up to 2 TOPS/W
1024 INT8 MACs, INT32 internal precision with dynamic scaling,17.3Mbits on-chip SRAM
Advanced coarse-grain and fine-grain FP32 to INT8 quantization with little or zero loss of accuracy
|CPU||ARM Cortex-A53 Quad Core|
|ISP||Up to 5.7 MP@30fps|
|System Peripherals||CAN FD, LIN, UART, SPI, QSPI, PWM, GPIO, I2C
Gigabit Ethernet AVB MAC (RGMII/RMII)
Want to see a demo?
Start your journey towards industry high efficiency ratio with aiWare!