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AImotive and Nextchip announce aiWare to be integrated into next-generation Apache5 Imaging Edge Processor

Nextchip disrupts automotive image processing market by integrating AImotive's high-performance aiWare NN Inference accelerator optimized for camera-first autonomous driving applications


October 08, 2019
Author: AImotive Press Release

Budapest, Hungary and Seoul, Korea, 30th September 2019 — AImotive, one of the world’s leading suppliers of scalable modular automated driving technologies, and Nextchip, a leading fabless semiconductor company specializing in advanced imaging processors for automotive markets, today announced that Nextchip has licensed AImotive’s aiWare Neural Network (NN) hardware accelerator IP. aiWare will be integrated into Nextchip’s next-generation Apache5 IEP (Imaging Edge Processor) SoC (System on Chip) targeting automotive OEMs and Tier1s. AImotive and Nextchip will combine their expertise to help Nextchip’s customers develop highly optimized ISO26262 certifiable L2 to L4 solutions using the Apache5 IEP, leveraging AImotive’s extensive experience and in-house knowledge of designing advanced AI solutions and complex DNNs for safety-critical automotive applications.

“Nextchip believes that highly integrated vision edge processors are a key enabler for L2 and above autonomous vehicles,” said YoungJun Yoo, CMO of Nextchip. “Nextchip has spent more than 20 years designing advanced image processor chips and related technologies for a wide range of vision systems, including supplying several leading automotive customers. By combining our vision SoC expertise with AImotive’s aiWare technology, complemented by their extensive knowledge of algorithm optimization for automotive AI applications, we believe our Apache5 IEP will enable our customers to deliver the most competitive, feature-rich ISO26262-compliant smart camera solutions for the automotive market.”

Marton Feher, senior vice president for hardware engineering at AImotive said: “We are extremely proud of the industry-leading performance and efficiencies we have achieved with aiWare for HD camera-based automotive NN applications. We are delighted to be working with a proven vision innovator like Nextchip to make our unique aiWare technology available to automotive camera subsystem suppliers. We look forward to working with Nextchip to help their customers realize their AI-enhanced solutions, leveraging the innovative aiWare-powered Apache5 IEP.”

Nextchip expects to start delivering samples of the Apache5 IEP SoC to lead customers in Q4 2020.

About aiWare:

The aiWare hardware NN accelerator has been proven through extensive benchmarks* to be among the most efficient hardware NN accelerator architectures available for high-resolution automotive vision applications. The aiWare hardware IP supports a range of advanced architectural features that enable it to be ideal component within ISO26262 ASIL A, B and above certified subsystems.

Designed to scale up to more than 100 TOPS at high efficiency and low power, aiWare’s low-level micro-architecture ensures the core is highly autonomous. As a result, the IP needs far less host CPU or shared memory resources than other hardware NN accelerators, by incorporating highly deterministic dataflow management (patent pending). The unique, highly parallel memory-centric architecture features up to 100x more on-chip memory bandwidth than other hardware NN accelerators, ensuring up to 95% sustained efficiency for complex DNNs used with large inputs such as HD cameras.

Supporting Khronos’ NNEF as well as open standard ONNX inputs, the comprehensive aiWare SDK directly compiles binaries with no need for low-level programming of DSPs or MCUs. It includes automated FP32 to INT8 conversion with little or no loss of accuracy, alongside a growing portfolio of sophisticated DNN performance analysis tools.

* See the latest aiWare benchmarks at www.aimotive.com/benchmarks

About Apache5:

The Apache5 IEP (Imaging Edge Processor) builds on the success of Apache4, featuring upgraded Quadcore A53 CPUs and more advanced imaging engines as well as significant NN acceleration for cameras up to 5 Mpixel resolution.

The integrated NN accelerator is capable of delivering 1 (one) TOPS performance at sustained efficiencies up to 95% with very low power consumption. Apache5 will also include the latest generation of Nextchip’s ISP (Imaging Signal processor) capable of supporting image sensors up to 5 Mpixel resolution, featuring noise correction, high dynamic range, LED flicker mitigation, defogging, format conversion, dead pixel correction, lens distortion correction, advanced parking guidance, and many other features.

The highly integrated set of capabilities on the Apache5 IEP will enable Tier1s and OEMs to address some of the most demanding challenges of autonomous automotive applications. The Apache5 IEP will be supplied to AEC-Q100 Class 2, and be certification-ready for ISO26262.

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